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  ? semiconductor components industries, llc, 2003 march, 2003 - rev. 1 1 publication order number: ntp75n06/d ntp75n06, ntb75n06 power mosfet 75 amps, 60 volts n-channel to-220 and d 2 pak designed for low voltage, high speed switching applications in power supplies, converters and power motor controls and bridge circuits. typical applications ? power supplies ? converters ? power motor controls ? bridge circuits maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit drain-to-source voltage v dss 60 vdc drain-to-gate voltage (r gs = 10 m w ) v dgr 60 vdc gate-to-source voltage - continuous - non-repetitive (t p  10 ms) v gs v gs  20  30 vdc drain current - continuous @ t a = 25 c - continuous @ t a = 100 c - single pulse (t p  10 m s) i d i d i dm 75 50 225 adc apk total power dissipation @ t a = 25 c derate above 25 c total power dissipation @ t a = 25 c p d 214 1.4 2.4 w w/ c w operating and storage temperature range t j , t stg - 55 to +175 c single pulse drain-to-source avalanche energy - starting t j = 25 c (v dd = 50 vdc, v gs = 10 vdc, l = 0.3 mh i l(pk) = 75 a, v ds = 60 vdc) e as 844 mj thermal resistance - junction-to-case - junction-to-ambient r q jc r q ja 0.7 62.5 c/w maximum lead temperature for soldering purposes, 1/8 from case for 10 seconds t l 260 c 75 amperes 60 volts r ds(on) = 9.5 m w device package shipping ordering information ntp75n06 to-220ab 50 units/rail to-220ab case 221a style 5 1 2 3 4 n-channel d s g marking diagrams & pin assignments 75n06 = device code ll = location code y = year ww = work week 75n06 llyww 1 gate 3 source 4 drain 2 drain 75n06 llyww 1 gate 3 source 4 drain 2 drain 1 2 3 4 d 2 pak case 418b style 2 ntb75n06 d 2 pak 50 units/rail ntb75n06t4 d 2 pak 800/tape & reel http://onsemi.com
ntp75n06, ntb75n06 http://onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise noted) characteristic symbol min typ max unit off characteristics drain-to-source breakdown voltage (note 1) (v gs = 0 vdc, i d = 250 m adc) temperature coefficient (positive) v (br)dss 60 - 71 73 - - vdc mv/ c zero gate voltage drain current (v ds = 60 vdc, v gs = 0 vdc) (v ds = 60 vdc, v gs = 0 vdc, t j = 150 c) i dss - - - - 10 100 m adc gate-body leakage current (v gs = 20 vdc, v ds = 0 vdc) i gss - - 100 nadc on characteristics (note 1) gate threshold voltage (note 1) (v ds = v gs , i d = 250 m adc) threshold temperature coefficient (negative) v gs(th) 2.0 - 2.8 8.0 4.0 - vdc mv/ c static drain-to-source on-resistance (note 1) (v gs = 10 vdc, i d = 37.5 adc) r ds(on) - 8.2 9.5 mohm static drain-to-source on-voltage (note 1) (v gs = 10 vdc, i d = 75 adc) (v gs = 10 vdc, i d = 37.5 adc, t j = 150 c) v ds(on) - - 0.72 0.63 0.86 - vdc forward transconductance (note 1) (v ds = 15 vdc, i d = 37.5 adc) g fs - 40.2 - mhos dynamic characteristics input capacitance (v 25 vd v 0vd c iss - 3220 4510 pf output capacitance (v ds = 25 vdc, v gs = 0 vdc, f = 1.0 mhz ) c oss - 1020 1430 transfer capacitance f = 1 . 0 mhz) c rss - 234 330 switching characteristics (note 2) turn-on delay time t d(on) - 16 25 ns rise time (v dd = 30 vdc, i d = 75 adc, t r - 112 155 turn-of f delay time (v dd 30 vdc , i d 75 adc , v gs = 10 vdc, r g = 9.1 w ) (note 1) t d(off) - 90 125 fall time t f - 100 140 gate charge (v 48 vd i 75 ad q t - 92 130 nc (v ds = 48 vdc, i d = 75 adc, v gs = 10 vdc ) ( note 1 ) q 1 - 14 - v gs = 10 vdc) (note 1) q 2 - 44 - source-drain diode characteristics forward on-voltage (i s = 75 adc, v gs = 0 vdc) (note 1) (i s = 75 adc, v gs = 0 vdc, t j = 150 c) v sd - - 1.0 0.9 1.1 - vdc reverse recovery time (i 75 ad v 0vd t rr - 77 - ns (i s = 75 adc, v gs = 0 vdc, di s /dt = 100 a/ m s ) ( note 1 ) t a - 49 - di s /dt = 100 a/ m s) (note 1) t b - 28 - reverse recovery stored charge q rr - 0.16 - m c 1. pulse test: pulse width 300 m s, duty cycle 2%. 2. switching characteristics are independent of operating junction temperatures.
ntp75n06, ntb75n06 http://onsemi.com 3 0 120 3 60 2 1 i d , drain current (amps) 0 v gs , gate-t o-source voltage (v) i d , drain current (amps) r ds(on) , drain-to-source resistance ( w ) 160 v ds , drain-to-source voltage (v) 20 40 80 100 140 4 r ds(on) , drain-to-source resistance ( w ) 1.8 1.4 1.6 1.2 1 0.6 100 10 1000 10000 figure 1. on-region characteristics figure 2. transfer characteristics 080 60 40 20 100 160 figure 3. on-resistance vs. gate-to-source voltage i d , drain current (amps) figure 4. on-resistance vs. drain current and gate voltage i d , drain current (amps) figure 5. on-resistance variation with temperature t j , junction temperature ( c) figure 6. drain-to-source leakage current vs. voltage v ds , drain-to-source voltage (v) i dss , leakage (na) -50 50 25 0 -25 75 100 2.5 3 7 04050 30 20 10 60 120 60 0 160 20 40 80 100 140 3.5 4 4.5 5 5.5 6 6.5 r ds(on) , drain-to-source resistance (normalized) 0.8 175 150 125 0.009 0.011 0.003 0.013 0.015 v gs = 10 v t j = 25 c t j = 100 c t j = -55 c i d = 37.5 a v gs = 10 v v ds  10 v t j = 25 c t j = -55 c t j = 100 c t j = 100 c t j = 125 c t j = 150 c v gs = 0 v t j = 25 c t j = 100 c t j = -55 c v gs = 10 v v gs = 6 v v gs = 5 v v gs = 4.5 v v gs = 5.5 v v gs = 8 v v gs = 7 v v gs = 15 v v gs = 6.5 v v gs = 9 v 0.007 0.005 120 140 0 80 60 40 20 100 160 0.009 0.011 0.003 0.013 0.015 0.007 0.005 120 140 2
ntp75n06, ntb75n06 http://onsemi.com 4 1000 100 10 1 0 200 400 600 800 1000 8 4 10 2 6 0 12 50 10 10 6000 5 0 c, capacitance (pf) 0 q g , total gate charge (nc) figure 7. capacitance variation figure 8. gate-to-source and drain-to-source voltage vs. total charge v gs , gate-t o-source voltage (v) 1 1000 10 100 1 100 figure 9. resistive switching time variations vs. gate resistance r g , gate resistance ( w ) figure 10. diode forward voltage vs. current v sd , source-to-drain voltage (v) t, time (ns) figure 11. maximum rated forward biased safe operating area v ds , drain-to-source voltage (v) figure 12. maximum avalanche energy vs. starting junction temperature t j , starting junction temperature ( c) i d , drain current (amps) e as , single pulse drain-to-source avalanche energy (mj) 0.1 10 1 100 0 10 100 0.6 0.76 0.8 0.72 0.68 0.84 0.64 0.96 30 60 20 40 0 70 80 25 125 150 100 75 50 175 gate-t o-source or drain-to-source (v) 2000 4000 8000 10000 25 i s , source current (amps) 15 20 52030405060 0.86 0.92 r ds(on) limit thermal limit package limit v gs i d = 75 a t j = 25 c v gs v gs = 0 v v ds = 0 v t j = 25 c c rss c iss c oss c rss c iss v gs = 20 v single pulse t c = 25 c v ds = 30 v i d = 75 a v gs = 5 v v gs = 0 v t j = 25 c i d = 75 a 10 ms 1 ms 100 m s 10 m s dc t f t d(off) t d(on) t r v ds q 2 q 1 q t 10 70 80 90 1 10
ntp75n06, ntb75n06 http://onsemi.com 5 r(t), effective transient thermal resistance (normalized) t, time ( m s) figure 13. thermal response 0.1 1.0 0.01 0.1 0.2 0.02 d = 0.5 0.05 0.01 single pulse r q jc (t) = r(t) r q jc d curves apply for power pulse train shown read time at t 1 t j(pk) - t c = p (pk) r q jc (t) p (pk) t 1 t 2 duty cycle, d = t 1 /t 2 1.0 10 0.1 0.01 0.001 0.0001 0.00001 package dimensions to-220 three-lead to-220ab case 221a-09 issue aa style 5: pin 1. gate 2. drain 3. source 4. drain notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension z defines a zone where all body and lead irregularities are allowed. dim min max min max millimeters inches a 0.570 0.620 14.48 15.75 b 0.380 0.405 9.66 10.28 c 0.160 0.190 4.07 4.82 d 0.025 0.035 0.64 0.88 f 0.142 0.147 3.61 3.73 g 0.095 0.105 2.42 2.66 h 0.110 0.155 2.80 3.93 j 0.018 0.025 0.46 0.64 k 0.500 0.562 12.70 14.27 l 0.045 0.060 1.15 1.52 n 0.190 0.210 4.83 5.33 q 0.100 0.120 2.54 3.04 r 0.080 0.110 2.04 2.79 s 0.045 0.055 1.15 1.39 t 0.235 0.255 5.97 6.47 u 0.000 0.050 0.00 1.27 v 0.045 --- 1.15 --- z --- 0.080 --- 2.04 b q h z l v g n a k f 123 4 d seating plane -t- c s t u r j
ntp75n06, ntb75n06 http://onsemi.com 6 package dimensions d 2 pak case 418b-04 issue h style 2: pin 1. gate 2. drain 3. source 4. drain seating plane s g d -t- m 0.13 (0.005) t 23 1 4 3 pl k j h v e c a dim min max min max millimeters inches a 0.340 0.380 8.64 9.65 b 0.380 0.405 9.65 10.29 c 0.160 0.190 4.06 4.83 d 0.020 0.035 0.51 0.89 e 0.045 0.055 1.14 1.40 g 0.100 bsc 2.54 bsc h 0.080 0.110 2.03 2.79 j 0.018 0.025 0.46 0.64 k 0.090 0.110 2.29 2.79 s 0.575 0.625 14.60 15.88 v 0.045 0.055 1.14 1.40 -b- m b w w notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. 418b-01 thru 418b-03 obsolete, new standard 418b-04. f 0.310 0.350 7.87 8.89 l 0.052 0.072 1.32 1.83 m 0.280 0.320 7.11 8.13 n 0.197 ref 5.00 ref p 0.079 ref 2.00 ref r 0.039 ref 0.99 ref m l f m l f m l f variable configuration zone r n p u view w-w view w-w view w-w 123 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. typicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including typicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 2-9-1 kamimeguro, meguro-ku, tokyo, japan 153-0051 phone : 81-3-5773-3850 on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. ntp75n06/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303-675-2175 or 800-344-3860 toll free usa/canada fax : 303-675-2176 or 800-344-3867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 800-282-9855 toll free usa/canada


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